Power validation tool for microprocessor systems

ABSTRACT

A power validation tool is used in place of an actual microprocessor to validate a power source to determine if the power source is capable of meeting power requirements of the microprocessor. The validation tool is placed into a socket reserved for the microprocessor. A pulse generator supplies a pulse signal to toggle a load between minimum and maximum load current values, while a window comparator monitors the voltage to determine if the load change causes the source voltage to rise above or fall below an accepted range.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to the field of semiconductors and, moreparticularly, to tools for validating power requirements associated withmicroprocessors.

2. Prior Art

An overwhelming demand is being placed on power systems of current andfuture generations of personal computers (PCs), as well as on othercomputing devices utilizing microprocessors. Newer and higherperformance processors generally require more power, yet operate atreduced voltage levels. Additional power requirements are due to anumber of reasons, but primarily due to the sheer number and density oftransistors being packaged on a chip, coupled with the requirement ofoperating at a much faster clock frequency. Thus, enhancements incomputing speed and capability of a microprocessor place considerableconstraint on a power supply (or system) providing the necessary powerfor operating the processor.

With the advent and proliferation of laptop, notebook, sub-notebook,pocket and hand-held computers, a trend has been to include powermanagement functions for use on microprocessors and peripherals in thePC. Power management is required to extend the battery life of portablecomputers. Reduced power consumption also aids in reducing heatdissipation, as well as lowering the energy costs associated with theoperation of a PC. These energy cost reduction constraints will be morepronounced in the future as the computer industry attempts to become"environmentally friendly" or more "green."

Although power management functions have their benefits, theserequirements place severe constraints on the power supply. A PC "waking"from its "dormant" (or "sleep") state to its fully operational state cantransition from a few milliamperes to several amperes in a very shortspan of time. For example, one power managed microprocessor has aminimum current draw of approximately 1 mA and a maximum current draw ofapproximately 1.2 A. An almost instantaneous change from minimum to fullmaximum current results in a significantly high current transition,which is referenced as di/dt. In the example above, a change of 1 mA to1.2 A in a matter of 100 nanoseconds results in a di/dt of approximately1.2×10⁷ A/sec. ((1.2 A-1 mA) ÷100⁻⁹ sec.), which is quite significant.The di/dt problem is exacerbated when processors are made to operate atlower supply voltages, since the current drawn is increased in order toprovide the same amount of power to the processor. This increase incurrent will then result in a higher di/dt.

It is evident from the above description that future microprocessors andPCs will require power supplies that can cope with these constraints. Atypical low cost switching power supply, such as is found in currentstate-of-the-art PCs, is not designed for low minimum loads nor can itmaintain regulation when the load changes rapidly over a significantrange, such as when a processor undergoes a power management transition.The power supply can have a poor level of transient response that canlead to apparently random failures of the processor. While this failuremay not permanently damage the processor, it can result in lost data.Diagnosing repeated failures may be extremely difficult, since suchproblems will more than likely be dependent on the software executingthe power routine. In some instances, poor transient response can causethe supply voltage to rise to dangerous levels and may in fact damagecomponents, including the microprocessor. In any event, failures due topoor response by the power supply are not acceptable from a reliabilityperspective.

In order to ensure that adequate power supply capabilities exist for asystem, it is preferable to test a given power supply under operatingconditions. Therefore, an OEM (original equipment manufacturer) canmanufacture a system (component or an assembly), which includes amicroprocessor, and test for the desired power requirements. Adequatepower supplies can then be selected or designed in conjunction with"cycling" the processor through its various power transitions. However,this assumes that a fully functional microprocessor is available forsuch tests.

An alternative approach is to simulate the power requirements of amicroprocessor by utilizing some form of hardware or software emulation.However, such emulation will necessarily take some amount of engineeringon the part of the OEM to emulate the power requirements of themicroprocessor. The present invention, on the other hand, is a powervalidation tool (or device) that is designed to be a physical substitutefor the microprocessor from a power perspective, in order to determinethe response characteristics of the power supply.

SUMMARY OF THE INVENTION

The present invention describes a power validation tool for use in placeof an actual microprocessor or other semiconductor device to validate apower source to determine if the power source is capable of meetingpower requirements of the microprocessor. The validation tool is placedinto a socket reserved for the microprocessor in order to place a loadon the power source, wherein the load is a dynamic load emulating thatof the microprocessor when it is coupled to the power source.

A pulse generator supplies a pulse signal of a set frequency fortoggling the load between minimum and maximum load current values, thatcorrespond to minimum and maximum currents drawn by the microprocessor.The frequency and the duty cycle of the pulsed signal are madeadjustable. The minimum and maximum current settings are alsoadjustable. A window comparator monitors the voltage of the power sourceto determine if the load change causes the source voltage to rise abovean upper threshold voltage or fall below a lower threshold voltage. Thetwo threshold levels are adjustable as well, so that these thresholdvoltages can be set to the minimum and maximum acceptable voltage levelsof the microprocessor. If the source voltage deviates outside of theacceptable range, a fault indication is noted.

Economic Advantage: By providing a means to test a system or powersource for power requirements of the microprocessor, systems can bevalidated prior to the introduction of the microprocessor. Further, ifsuch validation tools are provided to conform to the specifications ofthe microprocessor and if the component manufacturer produces thevalidating tool, system designers need not spend the effort to recreatetools of their own, which tools may or may not meet all of therequirements of the microprocessor. Thus, significant lead time is savedand engineering effort is reduced or not replicated, potentiallyresulting in economic savings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a pictorial illustration of a power validator of the presentinvention.

FIG. 2 is an elevation view of one side of the power validator of FIG.1.

FIG. 3 is a top elevation view of the power validator of FIG. 1 andshowing locations of switches, terminals and variable resistors utilizedin testing a system under test.

FIG. 4 is a circuit block diagram of the power validator of thepreferred embodiment.

FIGS. 5A, 5B and 5C show a circuit schematic diagram of the preferredembodiment.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

A power validation tool for applying a changing load to a power systemand dynamically observing the resulting response is described. In thefollowing description, numerous specific details are set forth, such asspecific devices, measuring techniques, voltage values, etc., in orderto provide a thorough understanding of the present invention. However,it will be obvious to one skilled in the art that the present inventionmay be practiced without these specific details. In other instances,well known techniques and structures have not been described in detailin order not to unnecessarily obscure the present invention. It is to benoted that a preferred embodiment of the present invention is described,however, it is readily understood that other embodiments can be designedand implemented without departing from the spirit and scope of thepresent invention. Furthermore, it is appreciated that the presentinvention need not be limited to the emulation of microprocessors only,but can be used in applications for validating power requirements ofother integrated circuit devices.

A power validator of the present invention functions by replacing amicroprocessor in a system which is to be tested. It is preferred tohave the power validator configured to have the same "footprint" and"pin-out" as the microprocessor being replaced. Thus, the powervalidator can be made to fit into the socket designed to accept themicroprocessor and "mimic" the microprocessor in terms of powerrequirements and response. The power validator is designed so that theminimum and maximum current draws can be adjusted to correspond to agiven microprocessor being emulated. Minimum and maximum voltage limitsare also adjustable in order to characterize the response of the powersupply to changes in the current drawn. Other adjustments are alsoavailable in order to allow for varying characteristics of themicroprocessor being emulated. Essentially, the power validatorfunctions as the microprocessor in terms of power requirements withoutthe actual presence of the microprocessor itself.

Referring to FIGS. 1, 2 and 3, a power validator tool 10 of the presentinvention is shown. This particular power validator 10 shown is designedto fit into a socket which accepts a microprocessor manufactured byIntel Corporation. However, it is appreciated that the validator 10 canbe readily adapted for other microprocessors or for many othersemiconductor devices as well. As noted by terminal connections 11located on the underside of a substantially square circuit board 12 ofthe validator 10, the connections 11 fit into the socket reserved for amicroprocessor. However, as earlier stated, the actual physicalconfiguration is a design choice and may differ significantly dependingon the particular device being emulated. The physical shape and size arealso a design choice, but it is preferred that the validator 10 not havea "footprint" (base dimension) dissimilar from the processor which it isemulating. The height of the validator 10 will typically be taller thanthe processor, but such height should be maintained reasonably to aminimum.

As is noted in FIGS. 1 and 2, the various components are disposed on thecircuit board 12. A heat sink 13 is also mounted on the circuit board 12for dissipating the generated heat when validator 10 is in operation.Heat sink 13 is comprised of two sections 14 and 15. A lower portion 14of the heat sink 13 is mounted on the board 12 and disposed toward theinterior of the validator 10. Circuit components requiring heatdissipation are attached to lower portion 14. The upper portion 15 ofthe heat sink 13 resides above the lower portion 14 and is finned toprovide maximum surface area for dissipation of heat. A fan 16 ismounted atop the upper portion 15 for further removing heat from thevalidator 10. Power to the fan is provided from the circuit board 12, asnoted by the wire 17 connections from the fan 16 to J2 on the board 12.The size of the heat sink 13, as well as the use of a fan 16 aredetermined by the amount of heat generated by the validator 10.

FIG. 3 shows the placement of the various terminals, test points,switches and variable resistors which are used during a power validationprocess. The circuit reference symbols correspond to those identified inthe circuit schematic of FIGS. 5A-C. It should also be noted that theactual placement of circuit components, as well as the circuit itself isa design choice. The validator 10, as shown in FIGS. 1-3, is a compactdevice which plugs into the socket reserved for the microprocessor andthe validator 10 emulates the microprocessor in terms of its powerrequirements. Thus, a power source for the microprocessor, which isusually a power supply within a computer system, provides power to thevalidator 10 as it would provide power to the microprocessor, ifpresent. The power connections to the target supply under test are shownas VDD and VSS on FIG. 3 and it is critical that the terminalconnections which are normally used for providing power to themicroprocessor (for example, VDD and VSS) also provide the same powerconnections to the validator 10. Essentially, the power pins to thevalidator 10 must match the power pins of the microprocessor beingemulated. The non-power pins of the of the validator are not used forthe validation process.

In order to power the validator, an additional power source is needed.Although the VDD and VSS supply could be used, it is preferable to usethis source strictly for validation purpose. The additional supply willprovide the necessary power to the power validator 10 for powering itscircuitry. Thus, this allows VDD and VSS to be used strictly for thevalidation purpose. In the preferred embodiment, the additional supply(not shown) is a +12 volt source connected to J1 of the validator 10.

Referring to FIG. 4, a block circuit diagram of the validator 10 isshown. FIGS. 5A-C show the circuit schematic diagram of the validator10. Furthermore, component designation and values for the circuit ofFIGS. 5A-C are identified at the end of the description. Each of theblocks of FIG. 4 are identified as well in FIGS. 5A-C. Again, it is tobe stressed that the circuit shown is but one way of implementing thepresent invention. The overall function of the validator 10 is toestablish a well controlled and varying current load on a system undertest. This load has a minimum value and a maximum value. Each can be setby the user. The load is made to toggle between the minimum and maximumcurrent values at a frequency and duty cycle that can also be set by theuser. Upper and lower voltage limits of the system are also set by theuser and monitored by the validator when under test. If either of thevoltage limits are exceeded by the system when under load test, then anindication of such failure is made known to the user.

The operation of the preferred embodiment is described below. A pulsegenerator 20 is used to generate a continuous cycle of pulses at a givenfrequency. The frequency of the pulses is adjustable and is selected byadjusting R20. The set frequency is referred to as the toggle frequency,since this frequency determines the rate of toggle between maximum andminimum current. The output of the pulse generator 20 is then coupled toa multivibrator 21, which is used to vary the duty cycle of the pulse"train" at the output of the multivibrator 21. The duty cycle is set byadjusting R26. As configured in FIGS. 5A-C, R20 sets the frequency ofthe pulses and R26 sets the duty cycle of the pulses. The duty cycledetermines the percentage of time that the validator 10 spends drawingmaximum current. Thus, increasing the duty cycle will result in theincrease of power dissipation.

As configured, the frequency of the circuit of FIGS. 5A-C can be made totoggle between 100 Hz to 50,000 Hz generally and between 250 Hz to10,000 Hz for 50% duty cycle. The duty cycle is generally adjustablebetween 15% and 95%. Typically, a duty cycle of 50% will suffice forvalidating most systems. A 50% duty cycle can be obtained by placing ajumper connection between J3-2 and J3-3 and adjusting R26 fullycounter-clockwise. The duty cycle is made adjustable by placing a jumperconnection only between J3-1 and J3-2, which allows R26 to set the dutycycle. The duty cycle and the toggle frequency can be observed foradjusting by placing an oscilloscope probe between J4-1 and TP2 (currentground).

Next, the output of the multivibrator 21 is coupled through an invertedbuffer 22 to switch S1. Switch S1 determines if a particular validatorunit operates in either a master mode or a slave mode when used in amulti-processor environment, as will be explained below. In a typicalsingle processor system, switch S1 is set to the "master" position sothat the output of buffer 22 is coupled to a voltage-to-currentconverter/driver circuit 23.

The converter/driver 23 is driven by the input pulses and is made totoggle between a minimum current setting and a maximum current settingat the toggle rate and duty cycle determined by the voltage of the inputpulses. The converter/driver 23 is comprised of a converter stage (priorto U3) followed by a current driver stage (noted by Q1-Q5). The powersource under test is coupled as VDD and VSS to converter/driver 23.Transistor Q5 presents a dynamic load to the system (or supply) undertest.

Operational amplifier U3 is a high slew rate operational amplifier (45V/usec.) that drives a high current, push-pull driver stage Q1-Q4. Thisdrives the dynamic load Q5, which is a low Rds on field-effecttransistor. FET Q5 is mounted onto the heat sink 13 in order todissipate the generated heat when in operation. Since it is essential tominimize inductance in the dynamic load and especially in the sourcecircuit of Q5, an on-board (etched in copper alloy), low resistance(<0.01 ohm) shunt R11 is used to couple the source of Q5 to ground.

The minimum and maximum current settings are made adjustable by R3 andR28, respectively. R3 sets the minimum current level for performing apower validation test. R28 sets the maximum current level for performinga power validation test. It should be noted that R28 is actually anincremental adjustment for setting the maximum current. That is, R28sets a current level which is an incremental value above the minimumvalue set by R3.

It is to be appreciated that the minimum and maximum current calibrationand settings are strictly a design choice and the actual value willdepend on the particular device being emulated. In the particularcircuit of FIGS. 5A-C, the minimum current level is adjustable between 0to 5 A by the adjustment of R3. Then, R28 is adjusted for an incrementalvalue setting between 0 to 10 A above the minimum current setting.

The VDD and VSS terminals are also coupled to a window comparator 24 formonitoring the voltage between VDD and VSS supplied by the source undertest, while the load is made to vary between the two current extremes byconverter/driver 23. Comparator 24 is comprised of two stages ofcomparators, wherein one looks for a lower threshold voltage, while theother looks for an upper threshold voltage. Essentially, it looks for a"window" framed between the two threshold values.

The lower threshold voltage is set by coupling a voltmeter between TP10and TP9 and adjusting R16. A voltage value on the voltmeter correspondsto the lower setting. Thus, R16 is adjusted until a voltagecorresponding to the lower threshold voltage is measured on thevoltmeter. For setting the upper threshold voltage, the voltmeter iscoupled between TP8 and TP9. R17 is adjusted until a voltagecorresponding to the upper threshold voltage is measured on thevoltmeter. In the circuit shown, both lower and upper voltages can beadjusted between 2.3 and 5.4 volts. Generally the lower and uppervoltage limits (that is, the "window") is set to the correspondingminimum and maximum acceptable values specified for the device beingemulated.

Output of each comparator stage is coupled to a fault indicator stage25. A fault high indication is registered at TP11 and visually by DS1,whenever the supply voltage under test exceeds the upper thresholdvoltage setting. A fault low indication is registered at TP12 andvisually by DS2, whenever the supply voltage under test drops below thelower threshold voltage setting. Switches S2 and S3 are used to resetthe fault indicators. The outputs at TP11 and TP12 can be readilycoupled to external units for triggering an error indication.

Also shown in the circuit diagram are a voltage inverter and regulatorstage 27, thermal sensor 26 and a decoupling capacitor 28. A powersource, separate from that under test is coupled to provide power to thevalidator unit 10. In this particular embodiment, +12 volts is coupledto J1. A voltage inverter U6 taps the +12 V and supplies a -12 V to thecircuit. The +12 V is also coupled to regulators for the generation of+10 V and VCC (of +5 V). Of course, these voltages are strictly a designchoice.

The thermal sensor 26 in the circuit of FIG. 5A is a thermal switch S4,which is mounted on the heat sink 13. When power dissipation causes anexcessively high temperature condition, the heat causes S4 to close,therein shorting the input to the current driver stage ofconverter/driver 23 to ground. The grounding out of the current drivesignal reduces the load to a negligible value, near zero.

The decoupling capacitor 28 provides for the decoupling of VDD to VSS.In use, capacitor 28 is actually a plurality of capacitors distributedthroughout the power plane on the circuit board 12 for providing thedecoupling throughout the board 12. The purpose of having a plurality ofcapacitors is to emulate the expected package capacitance of themicroprocessor being substituted.

In the event multiple processor systems are to be tested, a validatorunit 10 can be substituted for each processor to validate the totalprocessor power requirements on the system. In that event, eachvalidator 10 would be set individually, but when functionally placed inthe system, only one is utilized as the master unit. The one validatorunit 10 selected as the master unit has its switch S1 set to the"MASTER" position. The other validators 10 have S1 set to the "SLAVE"position. A jumper wire is coupled from J4-1 on the master unit to J4-2of the first slave unit. Another jumper wire then couples J4-3 of thefirst slave unit to J4-2 of the subsequent slave unit. This secondconnection is repeated for all subsequent slave units. Therefore, thepulses generated by the master unit are coupled to drive all of thevalidator units, such that all of the validator units 10 are drivensynchronously to provide a total load on the supply under test.

Thus, a power validator tool of the present invention is described. Itis to be noted that the validator can be readily adapted for performinga variety of tasks as well. For example, the validator 10 can be set oradjusted either in or out of the target system. When outside of thetarget system, a fixture (such as a jig) can be constructed to house thevalidator. The validator can be utilized to provide a simple indicationor used to provide quantitative information which may be useful indiagnosing failed or marginal systems. It can also be used to checkcontrol loop resonance. Further, the various adjustments can beautomated and controlled by a software routine by making designmodifications to the existing validator design.

Furthermore, in reference to the circuit components noted in theschematic of FIGS. 5A-C, the combinations are endless in designing acircuit for the validator of the present invention. However, in order toshow one working embodiment, the following component list is given. Itis to be noted that the validator is not limited specifically to thecomponent list.

Component values for the circuit of FIGS. 5A-C are as follows (allresistor values are in ohms and capacitor values are in uF, unlessotherwise noted):

    ______________________________________                                        U1         NE556D      U2        74HCT04                                      U3         HA9P5221-5  U4        TLC277CD                                     U5         MAX902CSD   U6        LT1054CDW                                    VR1        TL750L10CLP VR2       UA7805CKC                                    Q1,Q2      2N4401      Q3,Q4     2N4403                                       Q5         IRFZ44      D1        15V                                          R1         10.0K       R2        500, 20T                                     R3,R28     1K, 20T     R4        243                                          R5         20.0K       R6        510                                          R7,R8      5.1K        R9        1K                                           R10        1K          R11       0.005, 1%, 2W                                R12        20K         R13       1K                                           R14        4.42K       R15       3.57K                                        R16,Rl7    50K, 20T    R18       2.21K                                        R19,R27    1.0K        R20,R26   1M, 20T                                      R21        180         R22,R23   4.7K                                         R24,R25    1K          R29       5.1K                                         R30        20K 20T     C1-C4,    0.001, 50V                                                          C16-C19                                                C5,C6,C21-C29                                                                            0.10, 50V   C7        1000pF, 50V                                  C8,C13-C15,C30                                                                           22, 16V     C20       39pF, 50V                                    C9-C11     0.010, 50V  C12       0.0068, 50V                                  ______________________________________                                    

We claim:
 1. An apparatus utilized in place of an integrated circuitmicroprocessor to emulate a load placed on a power source by saidintegrated circuit microprocessor when present comprising:a signalgenerator for generating a pulsed signal having a set frequency; acurrent driver coupled to said power source for placing a dynamic loadon said power source, said dynamic load emulating said load placed onsaid power source when said integrated circuit microprocessor ispresent; said current driver also coupled to receive said pulsed signalfrom said signal generator in order to vary said dynamic load inresponse to said pulsed signal to emulate a current loadingcharacteristic of said integrated circuit microprocessor; a voltagesensor coupled to said power source for sensing voltage associated withsaid dynamic load and generating a fault indication signal when saidvoltage of said power source deviates from a set acceptable voltagerange which corresponds to an acceptable supply voltage range for saidintegrated circuit microprocessor; wherein said power source is testedto determine its response to a power requirement of said integratedcircuit microprocessor by use of emulation and without actual use ofsaid integrated circuit microprocessor.
 2. The apparatus of claim 1wherein said signal generator is capable of adjusting said setfrequency.
 3. The apparatus of claim 2 wherein said signal generator iscapable of adjusting a duty cycle of said pulsed signal.
 4. Theapparatus of claim 3 wherein said current driver switches between aminimum load current value and a maximum load current value when varyingin response to said pulsed signal and wherein said duty cycle determinesa time period said current driver is at said maximum load current value.5. The apparatus of claim 4 having a physical dimension and terminalconnections for fitting into a socket reserved for said integratedcircuit microprocessor.
 6. A power validation apparatus utilized inplace of an integrated circuit microprocessor to emulate a load placedon a power source by said integrated circuit microprocessor when presentcomprising:a signal generator for generating a pulsed signal having aset frequency and wherein said set frequency can be adjusted within apredefined range; a pulse adjusting circuit coupled to said signalgenerator for receiving said pulsed signal and adjusting a duty cycle ofsaid pulsed signal; a current driver coupled to said power source forplacing a dynamic load on said power source, said dynamic load emulatingsaid load placed on said power source when said integrated circuitmicroprocessor is present; said current driver being adjustable to setminimum and maximum load current values to emulate dynamic range of saidintegrated circuit microprocessor; said current driver also coupled toreceive said duty cycle adjusted, pulsed signal from said pulseadjusting circuit in order to switch said dynamic load between saidminimum and maximum load current values in response to said duty cycleadjusted, pulsed signal, wherein said duty cycle determines a timeperiod said current driver is at said maximum load current value; avoltage comparator coupled to said power source for sensing voltageassociated with said dynamic load; said voltage comparator beingadjustable to set lower and upper threshold voltage levels andgenerating a fault indication signal when said voltage from said powersource deviates outside of said set lower and upper threshold voltagelevels which corresponds to an acceptable supply voltage range for saidintegrated circuit microprocessor; wherein said power source is testedto determine its response to a power requirement of said integratedcircuit microprocessor by use of emulation and without actual use ofsaid integrated circuit microprocessor.
 7. The power validationapparatus of claim 6 wherein said current driver includes a voltage tocurrent converter circuit for converting said duty cycle adjusted,pulsed signal to drive said dynamic load.
 8. The power validationapparatus of claim 7 wherein said current driver includes a push-pullstage driving a field-effect-transistor dynamic load.
 9. The powervalidation apparatus of claim 8 having a physical dimension and terminalconnections for fitting into a socket reserved for said integratedcircuit microprocessor.
 10. A method of validating a power source, whichis used to supply power to an integrated circuit microprocessor, withouthaving said integrated circuit microprocessor actually coupled to saidpower source, but where a power requirement of said integrated circuiton said power source is emulated, comprising the steps of:providing avalidation tool that places a dynamic load on said power source in orderto emulate a load placed on said power source by said integrated circuitmicroprocessor when present; adjusting a signal generator of saidvalidation tool to generate a pulsed signal having a set frequency;adjusting minimum and maximum load current values of a current driver ofsaid validation tool coupled to said power source in order to switchsaid dynamic load between said minimum and maximum load current valuesto emulate a current loading characteristic of said integrated circuitmicroprocessor, said switching being in response to said pulsed signalcoupled from said signal generator; adjusting lower and upper thresholdlevels of a voltage sensor of said validation tool coupled to said powersource, in order to sense voltage associated with said dynamic load saidthreshold levels corresponding to an acceptable supply voltage range forsaid integrated circuit microprocessor; providing an indication of faultwhen said voltage of said power source deviates outside of said lowerand upper threshold voltage levels wherein said power source is testedto determine its response to a power requirement of said integratedcircuit microprocessor by use of emulation and without actual use ofsaid integrated circuit microprocessor.
 11. The method of claim 10further comprising the step of adjusting a duty cycle of said pulsedsignal, wherein said duty cycle determines a time period said currentdriver is at said maximum load current value.
 12. The method of claim 11wherein said validation tool is inserted in a socket reserved for saidintegrated circuit microprocessor to perform said validation.